Recently a new tool has been developed that dramatically improves the process of designing computer architecture. The BusCompiler™ tool (which is commercially available from CoWare™ Corporation of San Jose, Calif.) is a tool that facilitates the design and development of computer bus architectures. The BusCompiler™ tool inputs a file containing a formal protocol (e.g., input specification) that describes a bus architecture being designed and outputs a model of the bus architecture, which may be used to simulate the bus architecture. The input specification may comprise a number of expressions that are solved in order to simulate the bus architecture. The expressions may comprise mathematical operators and may include Boolean variables and operators.
Thus, a design engineer may create an input specification that comprises a number of expressions that describe characteristics of a computer architecture/logic for which a model or simulation is desired. The design engineer does not specify FSMs in the input specification. Based on the input specification, the BusCompiler™ tool creates and outputs a computer executable file that may be used to simulate the computer architecture being designed. The computer executable file comprises finite state machines (FSMs), which are automatically generated by the BusCompiler™ tool and which can be very large scale. Further, the complexity of the FSMs can grow exponentially as the complexity of the computer architecture/logic that is the subject of the model increases. Finite state machines are also used to design other computer architectures and logic.